In BFS Memory Controller, Wide Cache buffer structure is used where multiple packets are packed within one memory word to optimize buffer access bandwidth. With this, and because BFS can switch packets of different lengths, packet boundary information is lost in the wide cache buffer. If the packet boundary information (i.e. the packet length calculated by Aggregators) were to be sent on a different bus to Separators, (which need this to extract packets and send them to different Port Cards), then the Memory Controllers have to take this on a bus independent of data from Aggregators, Queue it up independent of data, and send it out to Separators on a bus independent of data. Also, within the Memory Controllers data queue link lists, and length information queue link lists have to be synchronized.